Cost-efficient multiplier-less FIR filter structure based on modified DECOR transformation
نویسندگان
چکیده
In this paper, we propose a new design approach to implement FIR filter using CSD multipliers based on Modified Decorrelating transformation (MDECOR). The direct CSD approach will introduce serious quantization errors since the distribution of CSD numbers is very non-uniform. The proposed MDECOR tranformation provides a systematic solution to reduce the dynamic range effectively. By combining the proposed MDECOR transformation followed by CSD quantization, we can avoid the aforementioned quantization problem. As a result, we do not need to employ additional non-zero bits to compensate for the distortion caused by direct CSD quantization, which helps to save the number of adders in VLSI implementations. Furthermore, the MDECOR transformation offers more design of freedom in the filter design. It can achieve high-precision performance under the same hardware complexity as the direct CSD approach. Our simulation results show that we can save 20% number of adders compared with the direct CSD approach.
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